Resolution:
standard / ## Figure 8.
Continuous observations of circuit with lower concentration for logic “1”. Change of Out and I_{2} over time while the four logic cases are being introduced dynamically. Until t ≈ 60 both inputs are “0” (case 0-0); from there until t ≈ 110 input A is a logic “1” (case 1-0); until t ≈ 160 input A is “0” while input B is “1” (case 0-1); until t ≈ 210 both inputs are “1”; from there onwards both inputs come back to “0”. As before,
logic “0” represented by 0 nM, but this time logic “1” is represented by 1.5 nM.
Goñi-Moreno and Amos |