Figure 5.

An n-bit adder/subtractor. An n-bit adder/subtractor that can perform addition or subtraction between two 1UN numbers during a broadcasting time. For additions the inputs are on the North and West borders and the output is on the South border. For subtractions, the inputs are on the West and South borders and the output is on the North border. The number on the West bound is 1-bit left-shifted. The dotted lines represent the omitted processing units that are the same as the ones in the last rows. This figure shows the addition of 3 and 3. Note: the leading 1 bit of input number on the West-bound (left) has been shifted off. The right border is fed with zero (or no signal) during the subtract operation.

Nguyen et al. BMC Genomics 2011 12(Suppl 5):S4   doi:10.1186/1471-2164-12-S5-S4